6月1日至5日，第37届国际功率半导体器件和集成电路年会（IEEE ISPSD，IEEE The 37th International Symposium on Power Semiconductor Devices and ICs）在日本召开。IEEE ISPSD是功率半导体领域最具影响力的国际学术会议，被誉为该领域的“奥林匹克”盛会。此次会议吸引了来自全球的672名学者和工程技术人员参与，共发表了来自16个国家和地区的176篇学术论文，展示了全球功率半导体技术的最新研究进展。
电子科技大学集成电路学院功率集成技术实验室（PITeL）主任张波教授带领团队25名师生参加了此次盛会，与全球同行分享了功率半导体的最新成果，共录用21篇论文（其中牵头发表16篇，含4篇Oral报告和12篇Poster论文），占全球发文总量的11.9%，无论是第一单位发表论文数还是发表论文总数均居全球第一。这是实验室自2013年以来第9次发表论文数位居全球第一。
功率集成技术实验室25名师生参加第37届IEEE ISPSD国际会议
功率集成技术实验室作为“功率半导体领域研究最为全面的学术团队”，在功率半导体领域具备40余年深厚学术积淀，入选论文主题涵盖了低压功率器件（LVT）、氮化镓功率器件（GaN）、功率集成电路设计（ICD）、碳化硅器件（SiC）和高压器件（HV）等重要领域，深入探讨了硅基/宽禁带功率半导体理论、器件新结构、功率集成技术、功率IC设计技术、可靠性等核心议题。
功率集成技术实验室牵头的4篇Oral报告
陈星弼院士发明的“超结”，被国际誉为“功率MOS的里程碑”。功率集成技术实验室长期坚持功率超结器件研究，章文通教授在其Oral报告中将超结理论推广应用于SOI材料，与合作企业一起创建了国内首个高温高压超结SOI BCD工艺平台，核心器件功率优值（FOM）达15.76 MW/cm2，也是国际首个FOM > 15 MW/cm2的硅基高压集成器件，并已通过175℃高温HTRB等可靠性考核，为国内车规级高温高压SOI基BCD工艺技术奠定了基础。在超结分立器件方面，实验室报道了600~1500 V超结器件，重点探讨了其开关特性和电磁干扰（EMI）优化等最新技术，并首次引入神经网络AI工具指导分立超结器件的设计和流片。
功率集成技术实验室牵头的12篇Poster报告
实验室积极开展宽禁带功率半导体芯片研究，此次会议在GaN领域入选了3篇Oral文章，其中，陆毅博士报道了一种适用于宽电源电压应用的单片集成GaN驱动器，聚焦高速全GaN单片驱动与智能保护，能满足数据中心三次电源高频GaN末级驱动应用需求；俞程博士创造性地提出在p-GaN HEMT缓冲层中引入空穴补偿层（HC-HEMT），并首次在p-GaN栅HEMT中观测到了类雪崩击穿行为，所发现的新机制有效解决了传统HEMT器件中无雪崩击穿的问题，显著提升了器件在重复过电压条件下的耐受能力，为大幅提高GaN HEMT的可靠性开辟了新途径；王钊博士则深入研究了总剂量辐射下p型栅氮化镓HEMTs漏电流（Ioff）非单调退化效应，并揭示了其辐射损伤机制，为极端环境下器件可靠性的分析提供了重要支撑。
自2006年功率集成技术实验室在IEEE ISPSD论文实现零的突破以来，迄今已在该国际会议发表学术论文130余篇。在今年的ISPSD会议中，功率集成技术实验室13名同学以第一作者发表了论文，充分展示了实验室在人才培养方面的显著成效。截至目前，实验室已培养博士99名、硕士1288名。“功率半导体领域最大学术研究团队”正不断发展壮大，持续为全球功率半导体发展贡献“成电力量”。
附录：功率集成技术实验室2025年IEEE ISPSD发表论文列表：
第一单位Oral
1. Wentong Zhang, Jiangnan Mu, et al., “Charge Field Modulation Mechanism and its Experiments in SJ-Based SOI BCD Process,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 81-84, Kumamoto, Japan, 2025.
2. Yi Lu, Xin Ming, et al., “A Monolithic GaN IC with Temperature Compensated Active Clamp Driver and Short-Circuit Protection for Wide Power Supply Range,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 89-92, Kumamoto, Japan, 2025.
3. Zhao Wang, Qingchen Jiang, et al., “Mechanism of Leakage Current Degradation in p-GaN Gate HEMTs Under Gamma Irradiation,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 121-124, Kumamoto, Japan, 2025.
4. Cheng Yu, Wanjun Chen, et al., “ p-GaN Gate HEMT with the Buffer Hole Compensation Layer for Achieving Repetitive Avalanche-Like Breakdown Capability,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 701-704, Kumamoto, Japan, 2025.
第一单位Poster
1. Dingxiang Ma, Yuanqing Ye, et al., “Design and Performance Enhancement of Integrated Schottky Contact in Low-Voltage LDMOS on 55nm BCD Platform,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 153-156, Kumamoto, Japan, 2025.
2. Teng Liu, Hao Wang, et al., “High Reliability Tri-Zone Heterogeneous Charge Balanced SJ-LDMOS with Novel Silicon Rich Oxide and its Experimental Verification,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 157-160, Kumamoto, Japan, 2025.
3. Yun Dai, Zekun Zhou, et al., “An On-Chip Tunable Negative Power Supply Within SiC MOSFET Gate Driver for Spurious Conduction Suppression and Reliable Driving,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 161-164, Kumamoto, Japan, 2025.
4. Yuhan Chen, Xin Ming, et al., “A High Precision and Robustness Isolated Analog Signal Sensing for Monitoring Power Stages,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 181-184, Kumamoto, Japan, 2025.
5. Lei Tang, Jinggui Zhou, et al., “A Comprehensive Study on Device Reliability and Failure Mechanism of 650V p-GaN Gate HEMTs Under Long-Term HTRB Stress Beyond 150 ℃,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 189-192, Kumamoto, Japan, 2025.
6. Jinggui Zhou, Shuting Huang, et al., “Self-Aligned p-GaN Gate Controlled Diodes with Tunable Forward Conduction/Reverse Blocking Properties for High Efficiency Buck Converter,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 197-200, Kumamoto, Japan, 2025.
7. Ruize Sun, Renjie Wu, et al., “Experiment and Simulation Study of Single-Event Burnout in GaN Event-Triggering HEMTs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 221-224, Kumamoto, Japan, 2025.
8. Huan Gao, Xin Zhou,, et al., “Heavy-Ion Radiation-Induced Dynamic On-Resistance Degradation for P-GaN Gate HEMTs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 233-236, Kumamoto, Japan, 2025.
9. Zhuocheng Wang, Wanjun Chen, et al., “High Performance p-GaN Gate HEMT with TiNxOy Resistive Field Plate Structure,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 305-308, Kumamoto, Japan, 2025.
10. Tongyang Wang, Zehong Li, et al., “A Superjunction MOSFET with Self-Adjustable Electron Path for Low Reverse Recovery Charge,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 437-440, Kumamoto, Japan, 2025.
11. Guoliang Yao, Ming Qiao, and Bo Zhang. “Fabrication and Optimization of 1550 V Semi-Superjunction MOSFET with Ultra-Low Specific On-Resistance and Enhanced Switching Performance,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 441-444, Kumamoto, Japan, 2025.
12. Jiahao Hu, Xiaochuan Deng, et al., “An In-Depth Investigation of Gate Ringing Induced by Total Ionizing Dose in SiC MOSFETs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 577-580, Kumamoto, Japan, 2025.
参与单位Oral
1. Jiajun Han, et al., “3 kV/2.9 mΩ·cm² β-Ga₂O₃ Vertical p–n Heterojunction Diodes with Helium-Implanted Edge Termination and Oxygen Post Annealing,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 357-360, Kumamoto, Japan, 2025.
参与单位Poster
1. Yeying Huang, et al., “Enhancing Key Performance of Vertical p-NiO/n-GaN Heterojunction Diodes Through Plasma Treatment and Oxygen Post-Annealing,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 333-336, Kumamoto, Japan, 2025.
2. Jinpei Lin, et al., “Enhancing Key Performance of Vertical GaN MOS Capacitors Through GaOx Interface Technology,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 337-340, Kumamoto, Japan, 2025.
3. Ping Li, et al., “Low EMI Noise Superjunction MOSFET with an N-Dot Region in the P-Pillar,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 421-424, Kumamoto, Japan, 2025.
4. Jing Chen, et al., “Intelligent Design of Superjunction Devices Based on Physics-Informed Neural Network,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 449-454, Kumamoto, Japan, 2025.
